Recently, silicon semiconductor devices are increasingly improved in performance as their design rule is miniaturized. It is still outstanding how to dissipate heat from discrete transistors and metal interconnects between transistors. To address the problem, several measures are manifested wherein after device fabrication, the silicon substrate on the back surface is thinned to one to several hundreds of microns, and a large fan is mounted on the chip to promote heat dissipation, or a water-cooled tube is arranged therearound.
However, even when the silicon substrate is actually thinned, the region where the device is fabricated (device active layer) extends several microns from the surface, and the remaining region serves as “heat sump.” It is thus concluded that the substrate remains less efficient in heat dissipation. Also, SOI wafers used in high-performance processors or the like have the structure including an insulating layer interposed immediately below the device active layer. The insulating layer (SiO2) is difficult to handle from the aspect of heat dissipation because it is a very low thermal conductivity material.
From the aspect of heat dissipation, it is believed desirable to arrange an efficient heat-dissipating material immediately below the device active layer.